A Wafer Scale Hybrid Integration Platform for Co-packaged Photonics using a

1 Suresh Venkatesan, 1 James Lee, 1 Simon Chun Kiat Goh, 2 Baochang Xu, 2 Aaron Thean, 2 Yeow Kheng

1 POET Technologies, 2 Department of Electrical and Computing Engineering National University of Singapore

Abstract: In this paper, we present a unique hybrid integration platform for wafer scale passive assembly of electronics and photonics devices using a CMOS based Optical Interposer. Our optical interposer enables seamless communications between electronics and photonics chips that are assembled on it using visually assisted passive flip chip bonding techniques. This unique integration platform is the first such platform in the industry adapted to directly modulated lasers and enables the world's smallest single chip Transmit/Receive Optical engine for 100G-400G optical engines.

Introduction: The explosive and exponential growth in data rates has necessitated a co-packagedmulti-chip module integrating both electronics and optical components (or photonic chiplets). This work explores the use of a silicon interposer modified with multiple optical waveguide layers to communicate both electrically and optically and enable a low cost wafer scale integration platform for such co-packaging applications. The platform has been applied to 100G DML- based Optical engines, to demonstrate the essential features of the hybrid integration platform and is readily extensible to 400G with compatible photonics components. Due to its modular construction, with pre-validated building blocks, the platform is easily adaptable to other applications for either high speed data transport or for applications that benefit from proximity placements of electronics and photonics. The electrical interfaces are accomplished with conventional electrical interposer functionality (metal traces and through silicon vias (TSVs), whereas the optical interfaces are accomplished with multiple layers of non-interacting optical waveguides layered above the electrical traces (Fig.1).

The Optical Interposer's Features: The Optical Interposer is constructed using CMOS compatible wafer fabrication methods using a high resistivity silicon substrate to enable high speed RF communications. Electrical traces required for component interconnectivity are first formed on the silicon substrate. Integrated heat sinks are incorporated under the metal and in regions of the interposer that house the lasers, enabling a low thermal resistance for the lasers, which is critical to ensure laser functionality in uncooled applications. Thereafter, multiple waveguide layers are monolithically integrated on the wafer. These waveguides are configured to perform the various optical functions required such as multiplexers, de-multiplexers, vertical and in-plane couplers, interferometers and directional coupler-based power taps. The Optical Interposer is then finished with low loss vertical coupling mirrors for out-of-plane optical connections and with mirror like etched facets for in-plane coupling of lasers and fiber connections. The features of such an Optical interposer are shown in Fig 2. Self-referencing pedestals, fiducial marks and mechanical guides enable visually-assisted passive placement of the optical devices integrated on the platform. Finally, eutectic solder is deposited on the interposer to promote flip-chip bonding of the optical and electrical

components that are subsequently assembled on the platform. Fig.3 shows the optical micrograph of a completed optical interposer chip prior to and post assembly, highlighting the various components of the interposer.

Results and Discussion: Waveguides: Our waveguides are designed to both be CMOS compatible and provide low loss characteristics. The material loss through the waveguides characterized by prism spectroscopy is <0.3dB/cm and is about one order of magnitude better than typically observed in small core silicon waveguides used in most other silicon photonics technologies. Moreover, our waveguides are largely athermal (dn/dT=12pm/°C) and are non-birefringent. A proprietary Spot Size Converter has been designed for chip facet fiber coupling achieving facet coupling losses of 0.25dB. Optical Passive device performance: Waveguides must be designed and configured into high performance optical passive devices for

use in any optical application. Multiplexers and Demultiplexers form the backbone of any direct detect data- communications WDM (wavelength division multiplexing) system. These devices have to be precisely engineered for the required bandwidth spectrum used (for example, FR4, LR4). Fig.4 shows the measured optical spectrum for the passive demux/mux devices built on the Optical Interposer for FR4 and LR4 systems respectively. Excellent insertion loss, crosstalk, channel uniformity are achieved exceeding requirements. Vertical Mirrors: In addition to in plane coupling of light, POET's optical interposers utilize vertical mirrors to enable out of plane coupling. The vertical mirrors are used with top- entry photodetectors and for wafer level test. Fig. 5 shows the construction and performance (0.5dB coupling loss) achieved by the vertical mirrors when coupled to a PD. Thermal Performance: Achieving low thermal resistance is a critical requirement for hybrid integration. Fig.6 shows a comparison of the thermal resistance of a conventional P-up lasers mounted on a standard AlN submount to that achieved with a P-down laser attached to the Optical Interposer. Equivalent thermal resistances are obtained suggesting a good thermal path from the heat source (laser) to the back of the interposer through the integrated heat sink. Laser Coupling: One of the key benefits to using the Optical Interposer is its visually assisted wafer scale passive placement of optical devices such as lasers while simultaneously achieving good coupling efficiency to the waveguides. Fig. 7 shows the coupling performance for CW lasers with integrated spot size converters. 90% (1dB) coupling efficiency has been achieved which is best in class for such passive alignment techniques.

Product Demonstration: The features of the Optical Interposer have been used along with compatible optical components to create the world's smallest single chip 100/200G Optical engine. At 6mmx9mm, this optical engine incorporates 4 lasers, 4 high speed photodetectors, 4 monitor photo diodes and a multiplexer/de-multiplexer pair. Fig. 8 shows an image of a completed and assembled optical engine.

The optical engine is so small, that one can fit four such engines inside a standard QSFP-DD module, thus quadrupling data rates for a given faceplate density. Fig. 9a shows the achieved eye diagrams for 100G transmission with excellent eye margins. Finally, Fig. 9b shows the BER/Sensitivity performance of 100G/200G receivers built using this technology again showing excellent characteristics and meeting 10km LR4 system requirements.

Conclusions: We have demonstrated a unique silicon-based wafer scale hybrid integration photonics packaging platform for applications in current and future datacenter applications. The versatile and low loss platform called the Optical Interposer includes all the features necessary for high speed datacenter applications : Excellent RF performance, low loss, athermal and non-birefringent waveguides and low loss chip- fiber coupling, high coupling efficiency passive placement of optical devices, excellent thermal properties with low thermal resistance and low cost through wafer scale assembly and test. Products assembled with the Optical Interposer show excellent performance for 100/200/400G applications.

Fig. 5: Construction and performance of a low loss vertical mirror

Fig. 6: Comparison of thermal resistance of a P-up laser on-AlN submount to that of a P-down laser attached to the Interposer

Fig. 1: A) Electrical interfaces and B) Optical interfaces with multiple layers of non-interacting optical waveguides

Fig. 7: Comparison of thermal resistance of a P-up laser on AlN sub- mount to that of a P-down laser attached to the Interposer

Fig. 3: Optical Interposer chip prior to (left) and post (right) assembly

Fig. 8: World's smallest fully assembled Optical Engine for 100G- 400G FR4 applications

Fig. 4: (a) FR4 Demux (b) LR4 Demux (c) FR4 Mux & (d) LR4 Mux spectral characteristics with excellent insertion loss and Xtalk

Fig. 9: (a) Eye Diagrams and (b) Receiver sensitivity for 100G optical engines meeting CWDM4 MSA specifications

Poet Technologies Inc. published this content on 15 June 2022 and is solely responsible for the information contained therein. Distributed by Public, unedited and unaltered, on 15 June 2022 19:42:01 UTC.